Theoretical and Practical Aspects of SPIN Model Checking 5th and 6th International SPIN Workshops, Trento, Italy, July 5, 1999, Toulouse, France, September 21 and 24, 1999, Proceedings /

Increasing the designer's con dence that a piece of software or hardwareis c- pliant with its speci cation has become a key objective in the design process for software and hardware systems. Many approaches to reaching this goal have been developed, including rigorous speci cation, formal veri...

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Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Άλλοι συγγραφείς: Dams, Dennis (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt), Gerth, Robert (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt), Leue, Stefan (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt), Massinek, Mieke (Επιμελητής έκδοσης, http://id.loc.gov/vocabulary/relators/edt)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 1999.
Έκδοση:1st ed. 1999.
Σειρά:Lecture Notes in Computer Science, 1680
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
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245 1 0 |a Theoretical and Practical Aspects of SPIN Model Checking  |h [electronic resource] :  |b 5th and 6th International SPIN Workshops, Trento, Italy, July 5, 1999, Toulouse, France, September 21 and 24, 1999, Proceedings /  |c edited by Dennis Dams, Robert Gerth, Stefan Leue, Mieke Massinek. 
250 |a 1st ed. 1999. 
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300 |a X, 282 p.  |b online resource. 
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490 1 |a Lecture Notes in Computer Science,  |x 0302-9743 ;  |v 1680 
505 0 |a I:Selection of Papers Presented at 5thSPIN99 -- Integrated Formal Verification: Using Model Checking with Automated Abstraction, Invariant Generation, and Theorem Proving -- Runtime Efficient State Compaction in Spin -- Distributed-Memory Model Checking with SPIN -- Partial Order Reduction in Presence of Rendez-vous Communications with Unless Constructs and Weak Fairness -- Divide, Abstract, and Model-Check -- II: Papers Presented at 6thSPIN99 -- Formal Methods Adoption: What's Working, What's Not! -- Model Checking for Managers -- Xspin/Project - Integrated Validation Management for Xspin -- Analyzing Mode Confusion via Model Checking -- Detecting Feature Interactions in the Terrestrial Trunked Radio (TETRA) Network Using Promela and Xspin -- Java PathFinder A Translator from Java to Promela -- VIP: A Visual Interface for Promela -- Events in Property Patterns -- Assume-Guarantee Model Checking of Software: A Comparative Case Study -- A Framework for Automatic Construction of Abstract Promela Models -- Model Checking Operator Procedures -- Applying Model Checking in Java Verification -- The Engineering of a Model Checker: the Gnu i-Protocol Case Study Revisited. -- Embedding a Dialect of SDL in PROMELA -- dSPIN: A Dynamic Extension of SPIN. 
520 |a Increasing the designer's con dence that a piece of software or hardwareis c- pliant with its speci cation has become a key objective in the design process for software and hardware systems. Many approaches to reaching this goal have been developed, including rigorous speci cation, formal veri cation, automated validation, and testing. Finite-state model checking, as it is supported by the explicit-state model checkerSPIN,is enjoying a constantly increasingpopularity in automated property validation of concurrent, message based systems. SPIN has been in large parts implemented and is being maintained by Gerard Ho- mann, and is freely available via ftp fromnetlib.bell-labs.comor from URL http://cm.bell-labs.com/cm/cs/what/spin/Man/README.html. The beauty of nite-state model checking lies in the possibility of building \push-button" validation tools. When the state space is nite, the state-space traversal will eventually terminate with a de nite verdict on the property that is being validated. Equally helpful is the fact that in case the property is inv- idated the model checker will return a counterexample, a feature that greatly facilitates fault identi cation. On the downside, the time it takes to obtain a verdict may be very long if the state space is large and the type of properties that can be validated is restricted to a logic of rather limited expressiveness. 
650 0 |a Computer software. 
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650 0 |a Programming languages (Electronic computers). 
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700 1 |a Leue, Stefan.  |e editor.  |4 edt  |4 http://id.loc.gov/vocabulary/relators/edt 
700 1 |a Massinek, Mieke.  |e editor.  |4 edt  |4 http://id.loc.gov/vocabulary/relators/edt 
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