High Performance Embedded Architectures and Compilers Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007. Proceedings /

• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Άλλοι συγγραφείς: Bosschere, Koen De (Επιμελητής έκδοσης), Kaeli, David (Επιμελητής έκδοσης), Stenström, Per (Επιμελητής έκδοσης), Whalley, David (Επιμελητής έκδοσης), Ungerer, Theo (Επιμελητής έκδοσης)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Berlin, Heidelberg : Springer Berlin Heidelberg, 2007.
• Σειρά: Lecture Notes in Computer Science, 4367
• Θέματα: Computer science.; Arithmetic and logic units, Computer.; Input-output equipment (Computers).; Logic design.; Microprocessors.; Computer communication systems.; Computers.; Computer Science.; Theory of Computation.; Arithmetic and Logic Structures.; Processor Architectures.; Input/Output and Data Communications.; Logic Design.; Computer Communication Networks.

Πίνακας περιεχομένων:

• Invited Program
• Keynote: Insight, Not (Random) Numbers: An Embedded Perspective
• I Secure and Low-Power Embedded Memory Systems
• Compiler-Assisted Memory Encryption for Embedded Processors
• Leveraging High Performance Data Cache Techniques to Save Power in Embedded Systems
• Applying Decay to Reduce Dynamic Power in Set-Associative Caches
• II Architecture/Compiler Optimizations for Efficient Embedded Processing
• Virtual Registers: Reducing Register Pressure Without Enlarging the Register File
• Bounds Checking with Taint-Based Analysis
• Reducing Exit Stub Memory Consumption in Code Caches
• III Adaptive Microarchitectures
• Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling
• Fetch Gating Control Through Speculative Instruction Window Weighting
• Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
• Branch History Matching: Branch Predictor Warmup for Sampled Simulation
• Sunflower : Full-System, Embedded Microarchitecture Evaluation
• Efficient Program Power Behavior Characterization
• Generation of Efficient Embedded Applications
• Performance/Energy Optimization of DSP Transforms on the XScale Processor
• Arx: A Toolset for the Efficient Simulation and Direct Synthesis of High-Performance Signal Processing Algorithms
• A Throughput-Driven Task Creation and Mapping for Network Processors
• Optimizations and Architectural Tradeoffs for Embedded Systems
• MiDataSets: Creating the Conditions for a More Realistic Evaluation of Iterative Optimization
• Evaluation of Offset Assignment Heuristics
• Customizing the Datapath and ISA of Soft VLIW Processors
• Instruction Set Extension Generation with Considering Physical Constraints.