Formal Methods: Applications and Technology 11th International Workshop, FMICS 2006 and 5th International Workshop PDMC 2006, Bonn, Germany, August 26-27, and August 31, 2006, Revised Selected Papers /

These are the joint ?nal proceedings of the 11th International Workshop on Formal Methods for Industrial Critical Systems (FMICS 2006) and the ?fth International Workshop on Parallel and Distributed Methods in Veri?cation (PDMC 2006). Both workshops were organized as satellite events of CONCUR 2006,...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Άλλοι συγγραφείς: Brim, Luboš (Επιμελητής έκδοσης), Haverkort, Boudewijn (Επιμελητής έκδοσης), Leucker, Martin (Επιμελητής έκδοσης), Pol, Jaco van de (Επιμελητής έκδοσης)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Berlin, Heidelberg : Springer Berlin Heidelberg, 2007.
Σειρά:Lecture Notes in Computer Science, 4346
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
Πίνακας περιεχομένων:
  • Invited Contributions
  • Challenges for Formal Verification in Industrial Setting
  • Distributed Verification: Exploring the Power of Raw Computing Power
  • FMICS
  • An Easy-to-Use, Efficient Tool-Chain to Analyze the Availability of Telecommunication Equipment
  • ”To Store or Not To Store” Reloaded: Reclaiming Memory on Demand
  • Discovering Symmetries
  • On Combining Partial Order Reduction with Fairness Assumptions
  • Test Coverage for Loose Timing Annotations
  • Model-Based Testing of a WAP Gateway: An Industrial Case-Study
  • Heuristics for ioco-Based Test-Based Modelling
  • Verifying VHDL Designs with Multiple Clocks in SMV
  • Verified Design of an Automated Parking Garage
  • Evaluating Quality of Service for Service Level Agreements
  • Simulation-Based Performance Analysis of a Medical Image-Processing Architecture
  • Blasting Linux Code
  • A Finite State Modeling of AFDX Frame Management Using Spin
  • UML 2.0 State Machines: Complete Formal Semantics Via core state machine
  • Automated Incremental Synthesis of Timed Automata
  • SAT-Based Verification of LTL Formulas
  • jmle: A Tool for Executing JML Specifications Via Constraint Programming
  • Goanna—A Static Model Checker
  • PDMC
  • Parallel SAT Solving in Bounded Model Checking
  • Parallel Algorithms for Finding SCCs in Implicitly Given Graphs
  • Can Saturation Be Parallelised?
  • Distributed Colored Petri Net Model-Checking with Cyclades.