High-Performance Computing 6th International Symposium, ISHPC 2005, Nara, Japan, September 7-9, 2005, First International Workshop on Advanced Low Power Systems, ALPS 2006, Revised Selected Papers /
This is the joint post-proceedings of the 6th International Symposium on High Performance Computing (ISHPC-VI) and the First International Workshop on Advanced Low Power Systems 2006 (ALPS2006). The post-proceedings also contain the papers presented at the Second HPF International Workshop: - perien...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Berlin, Heidelberg :
Springer Berlin Heidelberg,
2008.
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Σειρά: | Lecture Notes in Computer Science,
4759 |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- High Performance Computing
- Multiple Stream Prediction
- Enhanced Loop Coalescing: A Compiler Technique for Transforming Non-uniform Iteration Spaces
- Folding Active List for High Performance and Low Power
- Reducing Misspeculation Penalty in Trace-Level Speculative Multithreaded Architectures
- Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor
- Decoupled State-Execute Architecture
- A Scalable Methodology for Computing Fault-Free Paths in InfiniBand Torus Networks
- Using a Way Cache to Improve Performance of Set-Associative Caches
- Design of Fast Collective Communication Functions on Clustered Workstations with Ethernet and Myrinet
- Dynamic Load Balancing in MPI Jobs
- Workload Characterization of Stateful Networking Applications
- Using Recursion to Boost ATLAS’s Performance
- Towards Generic Solver of Combinatorial Optimization Problems with Autonomous Agents in P2P Networks
- New Evaluation Index of Incomplete Cholesky Preconditioning Effect
- T-Map: A Topological Approach to Visual Exploration of Time-Varying Volume Data
- Cross-Line — A Globally Adaptive Control Method of Interconnection Network
- The Bandwidth Expansion Effectiveness of Cache Levels Block Prefetch
- Implementation and Evaluation of the Mechanisms for Low Latency Communication on DIMMnet-2
- Computationally Efficient Parallel Matrix-Matrix Multiplication on the Torus
- A New Dynamic Load Balancing Technique for Parallel Modified PrefixSpan with Distributed Worker Paradigm and Its Performance Evaluation
- Performance-Based Loop Scheduling on Grid Environments
- Reconfigurable Middleware for Grid Environment
- : An Enhanced Stream-Based Communication Mechanism
- Performance of Coupled Parallel Finite Element Analysis in Grid Computing Environment
- Photo-Realistic Visualization for the Blast Wave of TNT Explosion by Grid-Based Rendering
- Development of an Interactive Visual Data Mining System for Atmospheric Science
- A Calculus Effectively Performing Event Formation with Visualization
- A Similarity Evaluation Method for Volume Data Sets by Using Critical Point Graph
- Hybrid Parallelization and Flat Parallelization in HPF (High Performance Fortran)
- Mapping Normalization Technique on the HPF Compiler fhpf
- Development of Electromagnetic Particle Simulation Code in an Open System
- Development of Three-Dimensional Neoclassical Transport Simulation Code with High Performance Fortran on a Vector-Parallel Computer
- Distributed Parallelization of Exact Charge Conservative Particle Simulation Code by High Performance Fortran
- Pipelined Parallelization in HPF Programs on the Earth Simulator
- Sampling of Protein Conformations with Computers to Predict the Native Structure
- Spacecraft Plasma Environment Analysis Via Large Scale 3D Plasma Particle Simulation
- PetaFLOPS Computing and Computational Nanotechnology on Industrial Issues
- 16.14 TFLOPS Eigenvalue Solver on the Earth Simulator: Exact Diagonalization for Ultra Largescale Hamiltonian Matrix
- Numerical Simulation of Combustion Dynamics at ISTA/JAXA
- Realization of a Computer Simulation Environment Based on ITBL and a Large Scale GW Calculation Performed on This Platform
- Computations of Global Seismic Wave Propagation in Three Dimensional Earth Model
- Lattice QCD Simulations as an HPC Challenge
- Energy-Efficient Embedded System Design at 90nm and Below – A System-Level Perspective –
- Empirical Study for Optimization of Power-Performance with On-Chip Memory
- Performance Evaluation of Compiler Controlled Power Saving Scheme
- Program Phase Detection Based Dynamic Control Mechanisms for Pipeline Stage Unification Adoption
- Reducing Energy in Instruction Caches by Using Multiple Line Buffers with Prediction.