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04286nam a22006135i 4500 |
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|a 9783540852612
|9 978-3-540-85261-2
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|a 10.1007/978-3-540-85261-2
|2 doi
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|a QA76.7-76.73
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|a QA76.76.C65
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|a COM010000
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|a 005.13
|2 23
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|a Languages and Compilers for Parallel Computing
|h [electronic resource] :
|b 20th International Workshop, LCPC 2007, Urbana, IL, USA, October 11-13, 2007, Revised Selected Papers /
|c edited by Vikram Adve, María Jesús Garzarán, Paul Petersen.
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|a Berlin, Heidelberg :
|b Springer Berlin Heidelberg,
|c 2008.
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|a XV, 354 p.
|b online resource.
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|a text
|b txt
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|a computer
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|a online resource
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 5234
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|a Reliability -- Compiler-Enhanced Incremental Checkpointing -- Techniques for Efficient Software Checking -- Languages -- Revisiting SIMD Programming -- Multidimensional Blocking in UPC -- An Experimental Evaluation of the New OpenMP Tasking Model -- Language Extensions in Support of Compiler Parallelization -- Parallel Compiler Technology I -- Concurrency Analysis for Shared Memory Programs with Textually Unaligned Barriers -- Iteration Disambiguation for Parallelism Identification in Time-Sliced Applications -- A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor -- Pillar: A Parallel Implementation Language -- Associative Parallel Containers in STAPL -- Explicit Dependence Metadata in an Active Visual Effects Library -- Supporting Huge Address Spaces in a Virtual Machine for Java on a Cluster -- Modeling Relations between Inputs and Dynamic Behavior for General Programs -- Evaluation of RDMA Opportunities in an Object-Oriented DSM -- Automatic Communication Performance Debugging in PGAS Languages -- Parallel Compiler Technology II -- Exploiting SIMD Parallelism with the CGiS Compiler Framework -- Critical Block Scheduling: A Thread-Level Parallelizing Mechanism for a Heterogeneous Chip Multiprocessor Architecture -- Languages II -- Capsules: Expressing Composable Computations in a Parallel Programming Model -- Communicating Multiprocessor-Tasks -- An Effective Automated Approach to Specialization of Code -- Flow-Sensitive Loop-Variant Variable Classification in Linear Time -- Using ZBDDs in Points-to Analysis.
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|a This book constitutes the thoroughly refereed post-conference proceedings of the 20th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2007, held in Urbana, IL, USA, in October 2007. The 23 revised full papers presented were carefully reviewed and selected from 49 submissions. The papers are organized in topical sections on reliability, languages, parallel compiler technology, libraries, run-time systems and performance analysis, and general compiler techniques.
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|a Computer science.
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|a Computer communication systems.
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|a Computer programming.
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|a Programming languages (Electronic computers).
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|a Data structures (Computer science).
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|a Computers.
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|a Computer Science.
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|a Programming Languages, Compilers, Interpreters.
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|a Programming Techniques.
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|a Computer Communication Networks.
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|a Data Structures.
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|a Computing Methodologies.
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|a Models and Principles.
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|a Adve, Vikram.
|e editor.
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|a Garzarán, María Jesús.
|e editor.
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|a Petersen, Paul.
|e editor.
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|a SpringerLink (Online service)
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|t Springer eBooks
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|i Printed edition:
|z 9783540852605
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 5234
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|u http://dx.doi.org/10.1007/978-3-540-85261-2
|z Full Text via HEAL-Link
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|a ZDB-2-SCS
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|a ZDB-2-LNC
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|a Computer Science (Springer-11645)
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