Computer Aided Verification 21st International Conference, CAV 2009, Grenoble, France, June 26 - July 2, 2009. Proceedings /

This book constitutes the refereed proceedings of the 21st International Conference on Computer Aided Verification, CAV 2009, held in Grenoble, France, in June/July 2009. The 36 revised full papers presented together with 16 tool papers and 4 invited talks and 4 invited tutorials were carefully revi...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Άλλοι συγγραφείς: Bouajjani, Ahmed (Επιμελητής έκδοσης), Maler, Oded (Επιμελητής έκδοσης)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Berlin, Heidelberg : Springer Berlin Heidelberg, 2009.
Σειρά:Lecture Notes in Computer Science, 5643
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 06622nam a22005655i 4500
001 978-3-642-02658-4
003 DE-He213
005 20151204163821.0
007 cr nn 008mamaa
008 100301s2009 gw | s |||| 0|eng d
020 |a 9783642026584  |9 978-3-642-02658-4 
024 7 |a 10.1007/978-3-642-02658-4  |2 doi 
040 |d GrThAP 
050 4 |a QA76.6-76.66 
072 7 |a UM  |2 bicssc 
072 7 |a COM051000  |2 bisacsh 
082 0 4 |a 005.11  |2 23 
245 1 0 |a Computer Aided Verification  |h [electronic resource] :  |b 21st International Conference, CAV 2009, Grenoble, France, June 26 - July 2, 2009. Proceedings /  |c edited by Ahmed Bouajjani, Oded Maler. 
264 1 |a Berlin, Heidelberg :  |b Springer Berlin Heidelberg,  |c 2009. 
300 |a XV, 722 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
490 1 |a Lecture Notes in Computer Science,  |x 0302-9743 ;  |v 5643 
505 0 |a Invited Tutorials -- Transactional Memory: Glimmer of a Theory -- Mixed-Signal System Verification: A High-Speed Link Example -- Modelling Epigenetic Information Maintenance: A Kappa Tutorial -- Component-Based Construction of Real-Time Systems in BIP -- Invited Talks -- Models and Proofs of Protocol Security: A Progress Report -- Predictability vs. Efficiency in the Multicore Era: Fight of Titans or Happy Ever after? -- SPEED: Symbolic Complexity Bound Analysis -- Regression Verification: Proving the Equivalence of Similar Programs -- Regular Papers -- Symbolic Counter Abstraction for Concurrent Software -- Priority Scheduling of Distributed Systems Based on Model Checking -- Explaining Counterexamples Using Causality -- Size-Change Termination, Monotonicity Constraints and Ranking Functions -- Linear Functional Fixed-points -- Better Quality in Synthesis through Quantitative Objectives -- Automatic Verification of Integer Array Programs -- Automated Analysis of Java Methods for Confidentiality -- Requirements Validation for Hybrid Systems -- Towards Performance Prediction of Compositional Models in Industrial GALS Designs -- Image Computation for Polynomial Dynamical Systems Using the Bernstein Expansion -- Cuts from Proofs: A Complete and Practical Technique for Solving Linear Inequalities over Integers -- Meta-analysis for Atomicity Violations under Nested Locking -- An Antichain Algorithm for LTL Realizability -- On Extending Bounded Proofs to Inductive Proofs -- Games through Nested Fixpoints -- Complete Instantiation for Quantified Formulas in Satisfiabiliby Modulo Theories -- Software Transactional Memory on Relaxed Memory Models -- Sliding Window Abstraction for Infinite Markov Chains -- Centaur Technology Media Unit Verification -- Incremental Instance Generation in Local Reasoning -- Quantifier Elimination via Functional Composition -- Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique -- Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation -- Generating and Analyzing Symbolic Traces of Simulink/Stateflow Models -- A Markov Chain Monte Carlo Sampler for Mixed Boolean/Integer Constraints -- Generalizing DPLL to Richer Logics -- Reducing Context-Bounded Concurrent Reachability to Sequential Reachability -- Intra-module Inference -- Static and Precise Detection of Concurrency Errors in Systems Code Using SMT Solvers -- Predecessor Sets of Dynamic Pushdown Networks with Tree-Regular Constraints -- Reachability Analysis of Hybrid Systems Using Support Functions -- Reducing Test Inputs Using Information Partitions -- On Using Floating-Point Computations to Help an Exact Linear Arithmetic Decision Procedure -- Cardinality Abstraction for Declarative Networking Applications -- Equivalence Checking of Static Affine Programs Using Widening to Handle Recurrences -- Tool Papers -- D-Finder: A Tool for Compositional Deadlock Detection and Verification -- HybridFluctuat: A Static Analyzer of Numerical Programs within a Continuous Environment -- The Zonotope Abstract Domain Taylor1+ -- InvGen: An Efficient Invariant Generator -- INFAMY: An Infinite-State Markov Model Checker -- Browser-Based Enforcement of Interface Contracts in Web Applications with BeepBeep -- Homer: A Higher-Order Observational Equivalence Model checkER -- Apron: A Library of Numerical Abstract Domains for Static Analysis -- Beaver: Engineering an Efficient SMT Solver for Bit-Vector Arithmetic -- CalFuzzer: An Extensible Active Testing Framework for Concurrent Programs -- MCMAS: A Model Checker for the Verification of Multi-Agent Systems -- TASS: Timing Analyzer of Scenario-Based Specifications -- Translation Validation: From Simulink to C -- VS3: SMT Solvers for Program Verification -- PAT: Towards Flexible Verification under Fairness -- A Concurrent Portfolio Approach to SMT Solving. 
520 |a This book constitutes the refereed proceedings of the 21st International Conference on Computer Aided Verification, CAV 2009, held in Grenoble, France, in June/July 2009. The 36 revised full papers presented together with 16 tool papers and 4 invited talks and 4 invited tutorials were carefully reviewed and selected from 135 regular paper and 34 tool paper submissions. The papers are dedicated to the advancement of the theory and practice of computer-aided formal analysis methods for hardware and software systems; their scope ranges from theoretical results to concrete applications, with an emphasis on practical verification tools and the underlying algorithms and techniques. 
650 0 |a Computer science. 
650 0 |a Architecture, Computer. 
650 0 |a Software engineering. 
650 0 |a Computer programming. 
650 0 |a Computer logic. 
650 0 |a Mathematical logic. 
650 1 4 |a Computer Science. 
650 2 4 |a Programming Techniques. 
650 2 4 |a Computer System Implementation. 
650 2 4 |a Software Engineering/Programming and Operating Systems. 
650 2 4 |a Logics and Meanings of Programs. 
650 2 4 |a Software Engineering. 
650 2 4 |a Mathematical Logic and Formal Languages. 
700 1 |a Bouajjani, Ahmed.  |e editor. 
700 1 |a Maler, Oded.  |e editor. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9783642026577 
830 0 |a Lecture Notes in Computer Science,  |x 0302-9743 ;  |v 5643 
856 4 0 |u http://dx.doi.org/10.1007/978-3-642-02658-4  |z Full Text via HEAL-Link 
912 |a ZDB-2-SCS 
912 |a ZDB-2-LNC 
950 |a Computer Science (Springer-11645)