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04181nam a22005655i 4500 |
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978-3-642-11950-7 |
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DE-He213 |
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20151204182205.0 |
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100407s2010 gw | s |||| 0|eng d |
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|a 9783642119507
|9 978-3-642-11950-7
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|a 10.1007/978-3-642-11950-7
|2 doi
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|d GrThAP
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|a TK5105.5-5105.9
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|a UKN
|2 bicssc
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|a COM075000
|2 bisacsh
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|a 004.6
|2 23
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|a Architecture of Computing Systems - ARCS 2010
|h [electronic resource] :
|b 23rd International Conference, Hannover, Germany, February 22-25, 2010. Proceedings /
|c edited by Christian Müller-Schloer, Wolfgang Karl, Sami Yehia.
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|a Berlin, Heidelberg :
|b Springer Berlin Heidelberg,
|c 2010.
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|a XIII, 247 p. 105 illus.
|b online resource.
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
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|a text file
|b PDF
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 5974
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|a Keynote -- HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors -- Processor Design -- How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT -- Complexity-Effective Rename Table Design for Rapid Speculation Recovery -- An Embedded GC Module with Support for Multiple Mutators and Weak References -- Embedded Systems -- A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems -- Autonomic Workload Management for Multi-core Processor Systems -- Firefly Flashing Synchronization as Inspiration for Self-synchronization of Walking Robot Gait Patterns Using a Decentralized Robot Control Architecture -- Organic Computing and Self-organization -- The JoSchKa System: Organic Job Distribution in Heterogeneous and Unreliable Environments -- On Deadlocks and Fairness in Self-organizing Resource-Flow Systems -- Ad-Hoc Information Spread between Mobile Devices: A Case Study in Analytical Modeling of Controlled Self-organization in IT Systems -- Processor Design and Transactional Memory -- MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance -- Exploiting Inactive Rename Slots for Detecting Soft Errors -- Efficient Transaction Nesting in Hardware Transactional Memory -- Energy Management in Distributed Environments and Ad-Hoc Grids -- Decentralized Energy-Management to Control Smart-Home Architectures -- EnergySaving Cluster Roll: Power Saving System for Clusters -- Effect of the Degree of Neighborhood on Resource Discovery in Ad Hoc Grids -- Performance Modelling and Benchmarking -- Compiler-Directed Performance Model Construction for Parallel Programs -- A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces -- JetBench: An Open Source Real-time Multiprocessor Benchmark -- Accelerators and GPUs -- A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics -- Optimizing Stencil Application on Multi-thread GPU Architecture Using Stream Programming Model.
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|a Computer science.
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|a Computer communication systems.
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|a Architecture, Computer.
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|a Software engineering.
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|a Operating systems (Computers).
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|a Computer engineering.
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|a Computer Science.
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|a Computer Communication Networks.
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|a Computer Engineering.
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|a Computer System Implementation.
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|a Operating Systems.
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|a Software Engineering.
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|a Information Systems Applications (incl. Internet).
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|a Müller-Schloer, Christian.
|e editor.
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|a Karl, Wolfgang.
|e editor.
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|a Yehia, Sami.
|e editor.
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710 |
2 |
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|a SpringerLink (Online service)
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|t Springer eBooks
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776 |
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|i Printed edition:
|z 9783642119491
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830 |
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|a Lecture Notes in Computer Science,
|x 0302-9743 ;
|v 5974
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856 |
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|u http://dx.doi.org/10.1007/978-3-642-11950-7
|z Full Text via HEAL-Link
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912 |
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|a ZDB-2-SCS
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912 |
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|a ZDB-2-LNC
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950 |
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|a Computer Science (Springer-11645)
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