Low Power RF Circuit Design in Standard CMOS Technology

Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for...

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Bibliographic Details
Main Authors: Alvarado, Unai (Author), Bistué, Guillermo (Author), Adín, Iñigo (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: Berlin, Heidelberg : Springer Berlin Heidelberg, 2012.
Series:Lecture Notes in Electrical Engineering, 104
Subjects:
Online Access:Full Text via HEAL-Link
Table of Contents:
  • Introduction
  • Power Considerations in Analog Rf CMOS Circuits
  • Impact of Architecture Selection on RF Front-End Power Consumption
  • Technology Structural Alternatives in Standard CMOS Technologies for Low-Power Analog Design
  • Schematic Design Techniques for Power Saving in RF
  • RF Amplifier Design
  • Mixer Design
  • Phase Locked Loop (PLL) Design.