Logic Circuit Design Selected Methods /

    In three main divisions the  book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have  no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the short...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριος συγγραφέας: Vingron, Shimon P. (Συγγραφέας)
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Berlin, Heidelberg : Springer Berlin Heidelberg, 2012.
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 03125nam a22004695i 4500
001 978-3-642-27657-6
003 DE-He213
005 20151125222127.0
007 cr nn 008mamaa
008 120328s2012 gw | s |||| 0|eng d
020 |a 9783642276576  |9 978-3-642-27657-6 
024 7 |a 10.1007/978-3-642-27657-6  |2 doi 
040 |d GrThAP 
050 4 |a TK7888.4 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
082 0 4 |a 621.3815  |2 23 
100 1 |a Vingron, Shimon P.  |e author. 
245 1 0 |a Logic Circuit Design  |h [electronic resource] :  |b Selected Methods /  |c by Shimon P. Vingron. 
264 1 |a Berlin, Heidelberg :  |b Springer Berlin Heidelberg,  |c 2012. 
300 |a XIV, 258 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Logic Variables, Logic Formulas, Karnaugh Maps, Reduced Karnaugh Maps -- Tautologies, Propositional Logic -- Canonical and Shegalkin Normal Forms, Minimising Logic Functions, Composition of Circuits -- Theory of Latches, Automata Models, Asynchronous Sequential Circuits, Verifying a Sequential Design. 
520 |a     In three main divisions the  book covers combinational circuits, latches, and asynchronous sequential circuits. Combinational circuits have  no memorising ability, while sequential circuits have such an ability to various degrees. Latches are the simplest sequential circuits, ones with the shortest memory. The presentation is decidedly non-standard.         The design of combinational circuits is discussed in an orthodox manner using normal forms and in an unorthodox manner using set-theoretical evaluation formulas relying heavily on Karnaugh maps. The latter approach allows for a new design technique called composition.          Latches are covered very extensively. Their memory functions are expressed mathematically in a time-independent manner allowing the use of (normal, non-temporal) Boolean logic in their calculation. The theory of latches is then used as the basis for calculating asynchronous circuits.         Asynchronous circuits are specified in a tree-representation, each internal node of the tree representing an internal latch of the circuit, the latches specified by the tree itself. The tree specification allows solutions of formidable problems such as algorithmic state assignment, finding equivalent states non-recursively, and verifying asynchronous circuits. 
650 0 |a Engineering. 
650 0 |a Logic design. 
650 0 |a Information theory. 
650 0 |a Electronic circuits. 
650 1 4 |a Engineering. 
650 2 4 |a Circuits and Systems. 
650 2 4 |a Logic Design. 
650 2 4 |a Electronic Circuits and Devices. 
650 2 4 |a Information and Communication, Circuits. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9783642276569 
856 4 0 |u http://dx.doi.org/10.1007/978-3-642-27657-6  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)