High-Performance D/A-Converters Application to Digital Transceivers /

This book deals with modeling and implementation of high performance, current-steering D/A-converters for digital transceivers in nanometer CMOS technology. In the first part, the fundamental performance limitations of current-steering DACs are discussed. Based on simplified models, closed-form expr...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριος συγγραφέας: Clara, Martin (Συγγραφέας)
Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2013.
Σειρά:Springer Series in Advanced Microelectronics, 36
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
LEADER 03008nam a22005535i 4500
001 978-3-642-31229-8
003 DE-He213
005 20151125191658.0
007 cr nn 008mamaa
008 121227s2013 gw | s |||| 0|eng d
020 |a 9783642312298  |9 978-3-642-31229-8 
024 7 |a 10.1007/978-3-642-31229-8  |2 doi 
040 |d GrThAP 
050 4 |a TK5102.9 
050 4 |a TA1637-1638 
050 4 |a TK7882.S65 
072 7 |a TTBM  |2 bicssc 
072 7 |a UYS  |2 bicssc 
072 7 |a TEC008000  |2 bisacsh 
072 7 |a COM073000  |2 bisacsh 
082 0 4 |a 621.382  |2 23 
100 1 |a Clara, Martin.  |e author. 
245 1 0 |a High-Performance D/A-Converters  |h [electronic resource] :  |b Application to Digital Transceivers /  |c by Martin Clara. 
264 1 |a Berlin, Heidelberg :  |b Springer Berlin Heidelberg :  |b Imprint: Springer,  |c 2013. 
300 |a XXII, 286 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
490 1 |a Springer Series in Advanced Microelectronics,  |x 1437-0387 ;  |v 36 
505 0 |a Performance Figures of D/A-Converters -- Static Linearity -- Dynamic Linearity -- Noise-shaped D/A-Converters -- Advanced Current Calibration. 
520 |a This book deals with modeling and implementation of high performance, current-steering D/A-converters for digital transceivers in nanometer CMOS technology. In the first part, the fundamental performance limitations of current-steering DACs are discussed. Based on simplified models, closed-form expressions for a number of basic non-ideal effects are derived and tested.  With the knowledge of basic performance limits, the converter and system architecture can be optimized in an early design phase, trading off circuit complexity, silicon area and power dissipation for static and dynamic performance. The second part describes four different current-steering DAC designs in standard 130 nm CMOS. The converters have a resolution in the range of 12-14 bits for an analog bandwidth between 2.2 MHz and 50 MHz and sampling rates from 100 MHz to 350 MHz. Dynamic-Element-Matching (DEM) and advanced dynamic current calibration techniques are employed to minimize the required silicon area. 
650 0 |a Engineering. 
650 0 |a Semiconductors. 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Microelectronics. 
650 1 4 |a Engineering. 
650 2 4 |a Signal, Image and Speech Processing. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
650 2 4 |a Semiconductors. 
650 2 4 |a Electronic Circuits and Devices. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer eBooks 
776 0 8 |i Printed edition:  |z 9783642312281 
830 0 |a Springer Series in Advanced Microelectronics,  |x 1437-0387 ;  |v 36 
856 4 0 |u http://dx.doi.org/10.1007/978-3-642-31229-8  |z Full Text via HEAL-Link 
912 |a ZDB-2-ENG 
950 |a Engineering (Springer-11647)