Digital Logic Design Using Verilog Coding and RTL Synthesis /

• Κύριος συγγραφέας: Taraate, Vaibbhav (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: New Delhi : Springer India : Imprint: Springer, 2016.
• Θέματα: Engineering.; Logic design.; Electronics.; Microelectronics.; Electronic circuits.; Circuits and Systems.; Electronics and Microelectronics, Instrumentation.; Logic Design.

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex...

Πίνακας περιεχομένων:

• Introduction
• Combinational Logic Design (Part I)
• Combinational Logic Design (Part II)
• Combinational Design Guidelines
• Sequential Logic Design
• Sequential Design Guidelines
• Complex Designs using Verilog RTL
• Finite State Machines
• Simulation Concepts and PLD Based Designs
• RTL Synthesis
• Static Timing Analysis (STA)
• Constraining Design
• Multiple Clock Domain Designs
• Low Power Design
• RTL Design for SOCs.