|
|
|
|
LEADER |
03493nam a22004695i 4500 |
001 |
978-90-481-3280-5 |
003 |
DE-He213 |
005 |
20151103123221.0 |
007 |
cr nn 008mamaa |
008 |
100301s2010 ne | s |||| 0|eng d |
020 |
|
|
|a 9789048132805
|9 978-90-481-3280-5
|
024 |
7 |
|
|a 10.1007/978-90-481-3280-5
|2 doi
|
040 |
|
|
|d GrThAP
|
050 |
|
4 |
|a TK7888.4
|
072 |
|
7 |
|a TJFC
|2 bicssc
|
072 |
|
7 |
|a TEC008010
|2 bisacsh
|
082 |
0 |
4 |
|a 621.3815
|2 23
|
100 |
1 |
|
|a Fulde, Michael.
|e author.
|
245 |
1 |
0 |
|a Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies
|h [electronic resource] /
|c by Michael Fulde.
|
264 |
|
1 |
|a Dordrecht :
|b Springer Netherlands,
|c 2010.
|
300 |
|
|
|a X, 127 p.
|b online resource.
|
336 |
|
|
|a text
|b txt
|2 rdacontent
|
337 |
|
|
|a computer
|b c
|2 rdamedia
|
338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|
347 |
|
|
|a text file
|b PDF
|2 rda
|
490 |
1 |
|
|a Springer Series in Advanced Microelectronics,
|x 1437-0387 ;
|v 28
|
505 |
0 |
|
|a Analog Properties of Multi-Gate MOSFETs -- High-k Related Design Issues -- Multi-Gate Related Design Aspects -- Multi-Gate Tunneling FETs -- Conclusions and Outlook.
|
520 |
|
|
|a Since scaling of CMOS is reaching the nanometer area serious limitations enforce the introduction of novel materials, device architectures and device concepts. Multi-gate devices employing high-k gate dielectrics are considered as promising solution overcoming these scaling limitations of conventional planar bulk CMOS. Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies provides a technology oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies. Closing the gap from technology to design a detailed insight into circuit performance trade-offs related to multi-gate and high-k device specifics is provided. The new effect of transient threshold voltage variations is described with an equivalent model that allows a systematic assessment of the consequences on circuit level and the development of countermeasures to compensate for performance degradation in comparators and A/D converters. Key analog, mixed-signal and RF building blocks are realized in high-k multi-gate technology and benchmarked against planar bulk. Performance and area benefits, enabled by advantageous multi-gate device properties are analytically and experimentally quantified for reference circuits, operational amplifiers and D/A converters. This is based on first time silicon investigations of complex mixed-signal building blocks as D/A converter and PLL with multi-gate devices. As another first, the integration of tunnel transistors in a multi-gate process is described, enabling devices with promising scaling and analog properties. Based on these devices a novel reference circuit is proposed which features low power consumption.
|
650 |
|
0 |
|a Engineering.
|
650 |
|
0 |
|a Electronic circuits.
|
650 |
|
0 |
|a Optical materials.
|
650 |
|
0 |
|a Electronic materials.
|
650 |
1 |
4 |
|a Engineering.
|
650 |
2 |
4 |
|a Circuits and Systems.
|
650 |
2 |
4 |
|a Optical and Electronic Materials.
|
710 |
2 |
|
|a SpringerLink (Online service)
|
773 |
0 |
|
|t Springer eBooks
|
776 |
0 |
8 |
|i Printed edition:
|z 9789048132799
|
830 |
|
0 |
|a Springer Series in Advanced Microelectronics,
|x 1437-0387 ;
|v 28
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-90-481-3280-5
|z Full Text via HEAL-Link
|
912 |
|
|
|a ZDB-2-ENG
|
950 |
|
|
|a Engineering (Springer-11647)
|