Krishnaswamy, S., Markov, I. L., & Hayes, J. P. (2013). Design, Analysis and Test of Logic Circuits Under Uncertainty. Springer Netherlands : Imprint: Springer.
Chicago Style (17th ed.) CitationKrishnaswamy, Smita, Igor L. Markov, and John P. Hayes. Design, Analysis and Test of Logic Circuits Under Uncertainty. Dordrecht: Springer Netherlands : Imprint: Springer, 2013.
MLA (8th ed.) CitationKrishnaswamy, Smita, et al. Design, Analysis and Test of Logic Circuits Under Uncertainty. Springer Netherlands : Imprint: Springer, 2013.
Warning: These citations may not always be 100% accurate.