High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip

This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliabilit...

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Bibliographic Details
Main Authors: Wang, Zheng (Author, http://id.loc.gov/vocabulary/relators/aut), Chattopadhyay, Anupam (http://id.loc.gov/vocabulary/relators/aut)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: Singapore : Springer Singapore : Imprint: Springer, 2018.
Edition:1st ed. 2018.
Series:Computer Architecture and Design Methodologies,
Subjects:
Online Access:Full Text via HEAL-Link
Table of Contents:
  • Introduction
  • Background
  • Related Work
  • High-level Fault Injection and Simulation
  • Architectural Reliability Estimation
  • Architectural Reliability Exploration
  • System-level Reliability Exploration
  • Conclusion and Outlook.