High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliabilit...
| Κύριοι συγγραφείς: | , |
|---|---|
| Συγγραφή απο Οργανισμό/Αρχή: | |
| Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
| Γλώσσα: | English |
| Έκδοση: |
Singapore :
Springer Singapore : Imprint: Springer,
2018.
|
| Έκδοση: | 1st ed. 2018. |
| Σειρά: | Computer Architecture and Design Methodologies,
|
| Θέματα: | |
| Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Introduction
- Background
- Related Work
- High-level Fault Injection and Simulation
- Architectural Reliability Estimation
- Architectural Reliability Exploration
- System-level Reliability Exploration
- Conclusion and Outlook.