| Περίληψη: | This thesis focuses on uplink data detection of a massive MIMO scheme. Two known algorithms for matrix inversion are evaluated considering precision and BER performance for the uplink detection system through MATLAB simulations. Furthermore, exploration of trade-offs in uplink data detection at hardware implementation level and aspects targeting FPGA designs are presented. Design trade-offs include size of datapath units for complexity reduction, hardware architectures for matrix operations, data representation optimization and trading latency for BER performance. Finally, an FPGA-optimized implementation is presented.
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