Design and implementation of a real-time pedestrian detection system on SoC FPGA

• Κύριος συγγραφέας: Χαλκιόπουλος, Φίλιππος
• Άλλοι συγγραφείς: Οικονόμου, Γεώργιος
• Μορφή: Thesis
• Γλώσσα: English
• Έκδοση: 2019
• Θέματα: Embedded systems; Pedestrian detection; Real-time; SoC FPGA; OpenCV; Hardware-software co-design; Ενσωματωμένα συστήματα; Ανίχνευση πεζών

Object Detection Systems have been developing in recent years, in order to add a key characteristic in system automation, the ability of a machine to detect objects without human intervention. These systems are pushing forward and leading on technologies such as driverless cars, surveillance systems, security systems, and others. In the past years, research in the field of object detection systems, produced algorithms that are capable to detect objects from an image, based on their feature extraction. An important algorithm that has been proposed for Pedestrian Detection, is Histogram of Oriented Gradients (HOG) by Dalal and Triggs. The algorithm extracts features of an image and feeds them in a machine learning algorithm, to determine if and where there is a person in an image with a big success rate. This thesis adopts the HOG algorithm alongside a classification algorithm – SVM (implemented in software with OpenCV library), for developing a system able to detect pedestrians in real time, from a video feed of a camera. Real-time pedestrian detection requires fast computation of the HOG and the image processing procedures which means, that the system has to process a big amount of data, in a short period of time. In addition, there is a need for flexibility of the system. It has to be flexible enough to get adopted by other systems, (such as cars, surveillance systems, machines, robots etc) and that requires the system to be easily configurable, to occupy minimum space, and have minimum energy consumption. Given the great demands of a real-time pedestrian detection system, which has to process big load of data while at the same time provide multiple interfaces for communication and adaption, this thesis proposes a design based on a Hardware-Software Co-design. This led to a system that uses either hardware or software for the implementation of the algorithms, designed to work together on a single chip (System on Chip – SoC). In this thesis the system is implemented with the use of Cyclone V SoC FPGA chip, which hosts an FPGA fabric, a dual-core ARM* Cortex*-A9 Hard Processor System (HPS), embedded peripherals, multiport memory controllers and serial transceivers. Summing up, this thesis aimed at designing and implementing a functional system able to detect pedestrian from a video stream coming from an onboard camera. The aim is, for the system to be flexible enough to integrate into other systems, and operate fast enough as a result of the implementation of many of its processes, hardware accelerated. The whole system is implemented on a single board which hosts the Cyclone V SoC FPGA chip, memory chips supporting the FPGA fabric and the HPS, the D8M camera kit which is connected through a parallel port, as well as the video output of the system. The output is extracted from a video DAC and a VGA connector.