Hardware for deep learning

The purpose of this diploma thesis is the research and development of efficient hardware architecture which can be used as an accelerator for Neural Networks of Deep Learning. More specifically, the development of the circuit was carried out with hardware description language (VHDL) and high-level,...

Full description

Bibliographic Details
Main Author: Ζαρκαδούλα, Καλλιρρόη
Other Authors: Παλιουράς, Βασίλειος
Format: Thesis
Language:English
Published: 2020
Subjects:
Online Access:http://hdl.handle.net/10889/12974