Energy efficient instruction decoding in application: Specific instruction - set processors

• Κύριος συγγραφέας: Κάργας, Χρήστος
• Άλλοι συγγραφείς: Γκούτης, Κωνσταντίνος
• Μορφή: Thesis
• Γλώσσα: English
• Έκδοση: 2013
• Θέματα: Processors; Low energy consumption; Orthogonal instruction-set; VLIW; ASIP; Επεξεργαστές; Χαμηλή κατανάλωση ενέργειας; Ορθογώνιο σύνολο εντολών; 621.391

With commercial processor design tools, a designer can quickly design a C- programmable ASIP for a specific application domain. There are several such ASIPs available for both wireless (UWB baseband processing), encryption, and biomedical processing (particularly for ECG beat detection). In traditional CPUs and DSPs the impact of the instruction-set definition and the complexity of the instruction decoder can be substantial, especially in terms of power consumption. Fully orthogonal VLIW processors, do not incur the cost of an instruction decoder that severely. Instead the instruction word becomes very large, thereby shifting the (power-)cost to the program memory or instruction cache. For the purposes of this thesis a SIMD processor is developed and is compared to a soft-SIMD to observe its area, performance and energy efficiency for a bioimaging benchmark and how the processor description in the ASIP language nML, defines the generated HDL. This SIMD processor is turned into orthogonal and using iterative experiments it is investigated, what is the impact on power while manipulating the instruction-set architecture in combination with the program memory size. It is also investigated how instruction-set re-configuration can be exploited to improve power efficiency. Using this investigation guidelines for low-power ASIP design can be produced.