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05500nam a2200805 4500 |
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ocn757486963 |
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OCoLC |
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20170124071704.1 |
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m o d |
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cr cnu---unuuu |
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111018s2011 njua ob 001 0 eng d |
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|a 2011022710
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|a DG1
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|a 760411076
|a 816865359
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|a 9781118146507
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|z (OCoLC)961625833
|z (OCoLC)962695105
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|a TK7895.E42
|b C48 2011eb
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|a COM
|x 059000
|2 bisacsh
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|a COM
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|a TEC008010
|2 bisacsh
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|a MAIN
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100 |
1 |
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|a Chu, Pong P.,
|d 1959-
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245 |
1 |
0 |
|a Embedded SOPC design with NIOS II processor and VHDL examples /
|c Pong P. Chu.
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264 |
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1 |
|a Hoboken, N.J. :
|b Wiley,
|c [2011]
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264 |
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4 |
|c ©2011
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300 |
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|a 1 online resource (xxxi, 703 pages) :
|b illustrations
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336 |
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|a text
|b txt
|2 rdacontent
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337 |
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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347 |
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|a data file
|2 rda
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380 |
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|a Bibliography
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|a Front Matter -- Overview of Embedded System -- Basic Digital Circuits Development. Gate-Level Combinational Circuit -- Overview of FPGA and EDA Software -- RT-Level Combinational Circuit -- Regular Sequential Circuit -- FSM -- FSMD -- Basic Nios II Software Development. Nios II Processor Overview -- Nios II System Derivation and Low-Level Access -- Predesigned Nios II I/O Peripherals -- Predesigned Nios II I/O Drivers and HAL API -- Interrupt and ISR -- Custom I/O Peripheral Development. Custom I/O Peripheral with PIO Cores -- Avalon Interconnect and SOPC Component -- SRAM and SDRAM Controllers -- PS2 Keyboard and Mouse -- VGA Controller -- Audio Codec Controller -- SD Card Controller -- Hardware Accelerator Case Studies. GCD Accelerator -- Mandelbrot Set Fractal Accelerator -- Direct Digital Frequency Synthesis -- References -- Index.
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|a "The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology.The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http://www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration"--
|c Provided by publisher.
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|a Includes bibliographical references and index.
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588 |
0 |
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|a Print version record.
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650 |
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0 |
|a Systems on a chip.
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650 |
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0 |
|a Field programmable gate arrays.
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650 |
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|a Computer input-output equipment
|x Design and construction.
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650 |
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0 |
|a VHDL (Computer hardware description language)
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650 |
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7 |
|a TECHNOLOGY & ENGINEERING
|x Electronics
|x Circuits
|x General.
|2 bisacsh
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650 |
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7 |
|a COMPUTERS
|x Computer Engineering.
|2 bisacsh
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7 |
|a COMPUTERS
|x Hardware
|x General.
|2 bisacsh
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7 |
|a COMPUTERS
|x Machine Theory.
|2 bisacsh
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650 |
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7 |
|a Computer input-output equipment
|x Design and construction.
|2 fast
|0 (OCoLC)fst00872207
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650 |
|
7 |
|a Field programmable gate arrays.
|2 fast
|0 (OCoLC)fst00923910
|
650 |
|
7 |
|a Systems on a chip.
|2 fast
|0 (OCoLC)fst01141473
|
650 |
|
7 |
|a VHDL (Computer hardware description language)
|2 fast
|0 (OCoLC)fst01163476
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655 |
|
4 |
|a Electronic books.
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710 |
2 |
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|a Wiley InterScience (Online service)
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776 |
0 |
8 |
|i Print version:
|a Chu, Pong P., 1959-
|t Embedded SOPC design with NIOS II processor and VHDL examples.
|d Hoboken, N.J. : Wiley, ©2011
|z 9781118008881
|w (DLC) 2011022710
|w (OCoLC)682892489
|
856 |
4 |
0 |
|u https://doi.org/10.1002/9781118146538
|z Full Text via HEAL-Link
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994 |
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|a 92
|b DG1
|