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05020nam a2200949 4500 |
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ocn774024203 |
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OCoLC |
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20170124070450.7 |
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m o d |
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120125s2012 nju ob 001 0 eng |
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|a 2012003493
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040 |
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|a DLC
|b eng
|e pn
|c DLC
|d EBLCP
|d N$T
|d YDXCP
|d MERUC
|d CDX
|d DG1
|d OCLCQ
|d IDEBK
|d E7B
|d UMI
|d COO
|d DEBSZ
|d OCLCQ
|d OCLCF
|d DEBBG
|d OCLCQ
|d AZK
|d DG1
|d OCLCQ
|d GrThAP
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|a 795914176
|a 817082380
|a 825072133
|a 961530788
|a 962709321
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|a 9781118309469
|q (electronic bk.)
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|a 1118309464
|q (electronic bk.)
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|a 9781118309728
|q (electronic bk.)
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|q (electronic bk.)
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|a 1280592397
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|a 9781118011034
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|z 111830957X
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|z 9781118011034
|q (hardback)
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|a AU@
|b 000050492075
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|a DEBBG
|b BV041120988
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|a DKDLA
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|a NZ1
|b 14699130
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|a (OCoLC)774024203
|z (OCoLC)795914176
|z (OCoLC)817082380
|z (OCoLC)825072133
|z (OCoLC)961530788
|z (OCoLC)962709321
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037 |
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|a 10.1002/9781118309728
|b Wiley InterScience
|n http://www3.interscience.wiley.com
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|a pcc
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1 |
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|a TK7895.E42
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|a COM
|x 000000
|2 bisacsh
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|a 006.2/2
|2 23
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|a TEC008010
|2 bisacsh
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049 |
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|a MAIN
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100 |
1 |
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|a Chu, Pong P.,
|d 1959-
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245 |
1 |
0 |
|a Embedded SoPC design with NIOS II processor and Verilog examples /
|c Pong P. Chu.
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264 |
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1 |
|a Hoboken, N.J. :
|b Wiley,
|c [2012]
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264 |
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4 |
|c ©2012
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263 |
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|a 1205
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300 |
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|a 1 online resource.
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336 |
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|a text
|b txt
|2 rdacontent
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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347 |
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|a data file
|2 rda
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380 |
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|a Bibliography
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504 |
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|a Includes bibliographical references and index.
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520 |
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|a "This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers"--
|c Provided by publisher.
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|a "The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures"--
|c Provided by publisher.
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0 |
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|a Embedded SoPC Design With Nios II Processor And Verilog Examples; Contents; Preface; Acknowledgments; 1 Overview of Embedded System; 1.1 Introduction; 1.1.1 Definition of an embedded system; 1.1.2 Example systems; 1.2 System design requirements; 1.3 Embedded SoPC systems; 1.3.1 Basic development flow; 1.4 Book organization; 1.5 Bibliographic notes; PART I BASIC DIGITAL CIRCUITS DEVELOPMENT; 2 Gate-level Combinational Circuit; 2.1 Introduction; 2.2 General description; 2.3 Basic lexical elements and data types; 2.3.1 Lexical elements; 2.4 Data types; 2.4.1 Four-value system.
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588 |
0 |
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|a Print version record.
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650 |
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0 |
|a Embedded computer systems.
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650 |
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0 |
|a Field programmable gate arrays.
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650 |
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0 |
|a Verilog (Computer hardware description language)
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650 |
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4 |
|a Embedded computer systems.
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650 |
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4 |
|a Systems on a chip.
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650 |
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4 |
|a Field programmable gate arrays.
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650 |
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4 |
|a Computer input-output equipment
|x Design and construction.
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650 |
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4 |
|a Verilog (Computer hardware description language)
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650 |
|
7 |
|a TECHNOLOGY & ENGINEERING
|x Electronics
|x Circuits
|x General.
|2 bisacsh
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650 |
|
7 |
|a COMPUTERS
|x General.
|2 bisacsh
|
650 |
|
7 |
|a Embedded computer systems.
|2 fast
|0 (OCoLC)fst00908298
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650 |
|
7 |
|a Field programmable gate arrays.
|2 fast
|0 (OCoLC)fst00923910
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650 |
|
7 |
|a Verilog (Computer hardware description language)
|2 fast
|0 (OCoLC)fst01165388
|
650 |
|
7 |
|a Embedded computer systems.
|2 local
|
650 |
|
7 |
|a Systems on a chip.
|2 local
|
650 |
|
7 |
|a Field programmable gate arrays.
|2 local
|
650 |
|
7 |
|a Computer input-output equipment / Design and construction.
|2 local
|
650 |
|
7 |
|a Verilog (Computer hardware description language)
|2 local
|
655 |
|
4 |
|a Electronic books.
|
655 |
|
7 |
|a Electronic books.
|2 local
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776 |
0 |
8 |
|i Print version:
|a Chu, Pong P., 1959-
|t Embedded SoPC design with NIOS II processor and Verilog examples.
|d Hoboken, N.J. : Wiley, ©2012
|z 9781118011034
|w (DLC) 2011048946
|
856 |
4 |
0 |
|u https://doi.org/10.1002/9781118309728
|z Full Text via HEAL-Link
|
994 |
|
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|a 92
|b DG1
|