Engineering the CMOS library : enhancing digital design kits for competitive silicon /
"This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can...
| Κύριος συγγραφέας: | |
|---|---|
| Συγγραφή απο Οργανισμό/Αρχή: | |
| Μορφή: | Ηλ. βιβλίο |
| Γλώσσα: | English |
| Έκδοση: |
Hoboken, N.J. :
John Wiley & Sons,
[2012]
|
| Θέματα: | |
| Διαθέσιμο Online: | Full Text via HEAL-Link |
| Περίληψη: | "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace. It suggests that there is an unrecognized value hidden in the safety margins of descriptive views in any piece of intellectual property (IP). This hidden value is normally left on the table. However, it can be used by the aggressive design engineer (or manager) to surpass the competition in the marketplace. This text reveals how the typical design house can enhance performance, reduce power, and improve the density of standard-cell logic. It will show how to add value to the generic, foundry-provided standard-cell library that most companies use without modification. Lastly, it identifies the low-risk opportunities aggressive designers and managers can employ to improve margin from overdesigned standard cells."-- "This book is about gaining a competitive edge in the Integrated Circuit IC marketplace"-- |
|---|---|
| Φυσική περιγραφή: | 1 online resource (iv, 327 pages) : illustrations |
| ISBN: | 9781118273142 1118273141 9781118273111 1118273117 9781118273135 1118273133 |
| DOI: | 10.1002/9781118273142 |
