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06519nam a2200829 4500 |
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ocn880831298 |
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20170124071158.5 |
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140530s2014 enk ob 001 0 eng |
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|a 2014021528
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|a DLC
|b eng
|e rda
|e pn
|c DLC
|d N$T
|d IDEBK
|d DG1
|d COO
|d YDXCP
|d CUS
|d CDX
|d E7B
|d B24X7
|d S9I
|d S4S
|d RECBK
|d CAUOI
|d OCLCQ
|d EBLCP
|d OCLCQ
|d DEBBG
|d DEBSZ
|d GrThAP
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|a 890509672
|a 891398198
|a 903173471
|a 911068927
|a 929526861
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|a 9781118701478
|q (ePub)
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|a 111870147X
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|a 9781118701683
|q (Adobe PDF)
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|a 1118701682
|q (Adobe PDF)
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|a 9781322024424
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|a 1322024421
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|a 9781118701409
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|a 1118701402
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|z 9781119965183
|q (cloth)
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|z 1119965187
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|a EB00592613
|b Recorded Books
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|a AU@
|b 000052933395
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|a CHBIS
|b 010259742
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|b 325941459
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|a NZ1
|b 15908988
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|a GBVCP
|b 814522734
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|a DEBBG
|b BV042987691
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|a DEBSZ
|b 475028295
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|a DEBBG
|b BV043396819
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|a (OCoLC)880831298
|z (OCoLC)890509672
|z (OCoLC)891398198
|z (OCoLC)903173471
|z (OCoLC)911068927
|z (OCoLC)929526861
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|a pcc
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|a TK7871.85
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|a TEC
|x 009070
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|a 621.3815/3
|2 23
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|a MAIN
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|a Voldman, Steven H.
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|a ESD :
|b analog circuits and design /
|c Steven H Voldman.
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|a Chichester, West Sussex :
|b Wiley,
|c [2015]
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|a 1 online resource.
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|a text
|b txt
|2 rdacontent
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|a computer
|b n
|2 rdamedia
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|a online resource
|b nc
|2 rdacarrier
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|a ESD series
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|a Includes bibliographical references and index.
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|a Print version record and CIP data provided by publisher.
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|a This book is about analog circuit design layout and schematic development, architecture of chips, and ESD design. Two critical design aspects for analog and power integrated circuits are combined. A comprehensive list of practical application examples is used to demonstrate the combination of both techniques and any potential design trade-offs. Features: describes analog design fundamentals (circuit fundamentals) as well as outlining the various ESD implications; covers a large breadth of subjects and technologies, such as CMOS, LDMOS, binary coded decimal, SOI, and thick body SOI; establishes an "ESD analog design" discipline that distinguishes itself from the alternative ESD digital design focus; focuses on circuit and circuit design applications. --
|c Edited summary from book.
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|a ESD Series; Title page; Copyright page; Dedication; About the Author; Preface; Acknowledgments; 1 Analog, ESD, and EOS; 1.1 ESD in Analog Design; 1.2 Analog Design Discipline and ESD Circuit Techniques; 1.3 Design Symmetry and ESD; 1.4 ESD Design Synthesis and Architecture Flow; 1.5 ESD Design and Noise; 1.6 ESD Design Concepts: Adjacency; 1.7 Electrical Overstress; 1.8 Reliability Technology Scaling and the Reliability Bathtub Curve; 1.9 Safe Operating Area; 1.10 Closing Comments and Summary; References; 2 Analog Design Layout; 2.1 Analog Design Layout Revisited; 2.2 Common Centroid Design
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|a 2.3 Interdigitation Design2.4 Common Centroid and Interdigitation Design; 2.5 Passive Element Design; 2.6 Resistor Element Design; 2.7 Capacitor Element Design; 2.8 Inductor Element Design; 2.9 Diode Design; 2.10 MOSFET Design; 2.11 Bipolar Transistor Design; 2.12 Closing Comments and Summary; References; 3 Analog Design Circuits; 3.1 Analog Circuits; 3.2 Single-Ended Receivers; 3.3 Differential Receivers; 3.4 Comparators; 3.5 Current Sources; 3.6 Current Mirrors; 3.7 Voltage Regulators; 3.8 Voltage Reference Circuits; 3.9 Converters; 3.10 Oscillators; 3.11 Phase Lock Loop
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|a 3.12 Delay Locked Loop3.13 Closing Comments and Summary; References; 4 Analog ESD Circuits; 4.1 Analog ESD Devices and Circuits; 4.2 ESD Diodes; 4.3 ESD MOSFET Circuits; 4.4 ESD Silicon-Controlled Rectifier Circuits; 4.5 Laterally Diffused MOS Circuits; 4.6 DeMOS Circuits; 4.7 Ultrahigh-Voltage LDMOS Circuits; 4.8 Closing Comments and Summary; References; 5 Analog and ESD Design Synthesis; 5.1 Early ESD Failures in Analog Design; 5.2 Mixed-Voltage Interface: Voltage Regulator Failures; 5.3 Separation of Analog Power from Digital Power AVDD to DVDD
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|a 5.4 ESD Failure in Phase Lock Loop (PLL) and System Clock5.5 ESD Failure in Current Mirrors; 5.6 ESD Failure in Schmitt Trigger Receivers; 5.7 Isolated Digital and Analog Domains; 5.8 ESD Protection Solution: Connectivity of AVDD to VDD; 5.9 Connectivity of AVSS to DVSS; 5.10 Digital and Analog Domain with ESD Power Clamps; 5.11 Digital and Analog Domain with Master/Slave ESD Power Clamps; 5.12 High-Voltage, Digital, and Analog Domain Floor Plan; 5.13 Closing Comments and Summary; References; 6 Analog-to-Digital ESD Design Synthesis; 6.1 Digital and Analog
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|a 6.2 Interdomain Signal Line ESD Failures6.3 Digital-to-Analog Core Spatial Isolation; 6.4 Digital-to-Analog Core Ground Coupling; 6.5 Domain-to-Domain Signal Line ESD Networks; 6.6 Domain-to-Domain Third-Party Coupling Networks; 6.7 Domain-to-Domain Cross-Domain ESD Power Clamp; 6.8 Digital-to-Analog Domain Moat; 6.9 Digital-to-Analog Domain Moat with Through-Silicon Via; 6.10 Domain-to-Domain ESD Design Rule Check and Verification Methods; 6.11 Closing Comments and Summary; References; 7 Analog-ESD Signal Pin Co-synthesis; 7.1 Analog Signal Pin; 7.2 Analog Signal Differential Receiver
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650 |
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|a Semiconductors
|x Protection.
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|a Analog integrated circuits
|x Protection.
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|a Analog integrated circuits
|x Design and construction.
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|a Electrostatics.
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|a Static eliminators.
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|a TECHNOLOGY & ENGINEERING
|x Mechanical.
|2 bisacsh
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4 |
|a Analog integrated circuits -- Design and construction.
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4 |
|a Analog integrated circuits -- Protection.
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650 |
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4 |
|a Electrostatics.
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650 |
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4 |
|a Semiconductors -- Protection.
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650 |
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4 |
|a Static eliminators.
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655 |
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4 |
|a Electronic books.
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655 |
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|a Electronic books.
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776 |
0 |
8 |
|i Print version:
|a Voldman, Steven H.
|t ESD.
|d Chichester, West Sussex : John Wiley & Sons Ltd., [2015]
|z 9781119965183
|w (DLC) 2014014598
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830 |
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|a ESD series.
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856 |
4 |
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|u https://doi.org/10.1002/9781118701409
|z Full Text via HEAL-Link
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|a 92
|b DG1
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