System level ESD co-design /

"Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design spa...

Πλήρης περιγραφή

Λεπτομέρειες βιβλιογραφικής εγγραφής
Κύριος συγγραφέας: Duvvury, Charvaka, 1944-
Άλλοι συγγραφείς: Gossner, Harald
Μορφή: Ηλ. βιβλίο
Γλώσσα:English
Έκδοση: Hoboken : John Wiley and Sons, Inc., 2015.
Σειρά:Wiley - IEEE
Θέματα:
Διαθέσιμο Online:Full Text via HEAL-Link
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037 |a 9781118861844  |b Wiley 
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049 |a MAIN 
100 1 |a Duvvury, Charvaka,  |d 1944- 
245 1 0 |a System level ESD co-design /  |c Charvaka Duvvury, Independent ESD Industry Consultant, Texas, USA, Harald Gossner, Intel, Germany. 
263 |a 1507 
264 1 |a Hoboken :  |b John Wiley and Sons, Inc.,  |c 2015. 
300 |a 1 online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b n  |2 rdamedia 
338 |a online resource  |b nc  |2 rdacarrier 
490 0 |a Wiley - IEEE 
520 |a "Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the "co-design", an optimization methodology to address both issues in the same design space"--  |c Provided by publisher. 
504 |a Includes bibliographical references and index. 
500 |a Machine generated contents note: Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index . 
588 |a Description based on print version record and CIP data provided by publisher; resource not viewed. 
506 |a Owing to Legal Deposit regulations this resource may only be accessed from within National Library of Scotland. For more information contact enquiries@nls.uk.  |5 StEdNL 
650 0 |a Shielding (Electricity) 
650 0 |a Electronic apparatus and appliances  |x Design and construction. 
650 0 |a Integrated circuits  |x Design and construction. 
650 0 |a Integrated circuits  |x Protection. 
650 0 |a Electrostatics. 
650 0 |a Static eliminators. 
650 7 |a TECHNOLOGY & ENGINEERING / Power Resources / General.  |2 bisacsh 
650 7 |a Electronic apparatus and appliances  |x Design and construction.  |2 fast  |0 (OCoLC)fst00906787 
650 7 |a Electrostatics.  |2 fast  |0 (OCoLC)fst00907767 
650 7 |a Integrated circuits  |x Design and construction.  |2 fast  |0 (OCoLC)fst00975545 
650 7 |a Integrated circuits  |x Protection.  |2 fast  |0 (OCoLC)fst00975587 
650 7 |a Shielding (Electricity)  |2 fast  |0 (OCoLC)fst01115906 
650 7 |a Static eliminators.  |2 fast  |0 (OCoLC)fst01132020 
650 7 |a SCIENCE / Physics / Electricity  |2 bisacsh 
650 7 |a SCIENCE / Physics / Electromagnetism  |2 bisacsh 
655 4 |a Electronic books. 
700 1 |a Gossner, Harald. 
776 0 8 |i Print version:  |a Duvvury, Charvaka, 1944-  |t System level ESD co-design  |d Hoboken : John Wiley and Sons, Inc., 2015  |z 9781118861905  |w (DLC) 2015008307 
856 4 0 |u https://doi.org/10.1002/9781118861899  |z Full Text via HEAL-Link 
994 |a 92  |b DG1