Functional Verification of Programmable Embedded Architectures A Top-Down Approach /

Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many ex...

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Bibliographic Details
Main Authors: Mishra, Prabhat (Author), Dutt, Nikil D. (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: Boston, MA : Springer US, 2005.
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ΒΚΠ - Πατρα: ALFd

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Call Number: 330.01 BAU
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ΒΚΠ - Πατρα: BSC

Holdings details from ΒΚΠ - Πατρα: BSC
Call Number: 330.01 BAU
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