Leakage in Nanometer CMOS Technologies
Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumptio...
| Main Authors: | Narendra, Siva G. (Author), Chandrakasan, Anantha (Author) |
|---|---|
| Corporate Author: | SpringerLink (Online service) |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Boston, MA :
Springer US,
2006.
|
| Series: | Series on Integrated Circuits and Systems,
|
| Subjects: | |
| Online Access: | Full Text via HEAL-Link |
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