The g m /I D Methodology, A Sizing Tool for Low-voltage Analog CMOS Circuits The semi-empirical and compact model approaches /

How to determine transistor sizes and currents when the supply voltages of analog CMOS circuits do not exceed 1.2V and transistors operate in weak, moderate or strong inversion? The gm/ID methodology offers a solution provided a reference transconductance over drain current ratio is available. The r...

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Bibliographic Details
Main Author: Jespers, Paul (Author)
Corporate Author: SpringerLink (Online service)
Format: Electronic eBook
Language:English
Published: Boston, MA : Springer US, 2010.
Series:Analog Circuits and Signal Processing
Subjects:
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ΒΚΠ - Πατρα: ALFd

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Call Number: 330.01 BAU
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