Design for Manufacturability and Yield for Nano-Scale CMOS

• Κύριοι συγγραφείς: Chiang, Charles C. (Συγγραφέας), Kawa, Jamil (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Dordrecht : Springer Netherlands, 2007.
• Σειρά: Series on Integrated Circuits and Systems,
• Θέματα: Engineering.; Microprocessors.; Software engineering.; Computer-aided engineering.; Electronics.; Microelectronics.; Electronic circuits.; Nanotechnology.; Circuits and Systems.; Electronics and Microelectronics, Instrumentation.; Computer-Aided Engineering (CAD, CAE) and Design.; Processor Architectures.; Software Engineering/Programming and Operating Systems.

As we approach the 32 nm CMOS technology node the design and manufacturing communities are dealing with a lithography system that has to print circuit artifacts that are significantly less than half the wavelength of the light source used, with new materials, with tighter pitches, and higher aspect...

Πίνακας περιεχομένων:

• Random Defects
• Systematic Yield - Lithography
• Systematic Yield - Chemical Mechanical Polishing (CMP)
• Variability & Parametric Yield
• Design for Yield
• Yield Prediction
• Conclusions.