Power-Aware Testing and Test Strategies for Low Power Devices
Power-Aware Testing and Test Strategies for Low-Power Devices Edited by: Patrick Girard, Research Director, CNRS / LIRMM, France Nicola Nicolici, Associate Professor, McMaster University, Canada Xiaoqing Wen, Professor, Kyushu Institute of Technology, Japan Managing the power consumption of circuits...
Συγγραφή απο Οργανισμό/Αρχή: | |
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Άλλοι συγγραφείς: | , , |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Boston, MA :
Springer US,
2010.
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Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- Fundamentals of VLSI Testing
- Power Issues During Test
- Low-Power Test Pattern Generation
- Power-Aware Design-for-Test
- Power-Aware Test Data Compression and BIST
- Power-Aware System-Level Test Planning
- Low-Power Design Techniques and Test Implications
- Test Strategies for Multivoltage Designs
- Test Strategies for Gated Clock Designs
- Test of Power Management Structures
- EDA Solution for Power-Aware Design-for-Test.