Low Power Networks-on-Chip

Low Power Networks-on-Chip Edited by: (editors) Cristina Silvano Marcello Lajolo Gianluca Palermo In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and res...

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Bibliographic Details
Corporate Author: SpringerLink (Online service)
Other Authors: Silvano, Cristina (Editor), Lajolo, Marcello (Editor), Palermo, Gianluca (Editor)
Format: Electronic eBook
Language:English
Published: Boston, MA : Springer US : Imprint: Springer, 2011.
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ΒΚΠ - Πατρα: ALFd

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