Low Power Networks-on-Chip

• Corporate Author: SpringerLink (Online service)
• Other Authors: Silvano, Cristina (Editor), Lajolo, Marcello (Editor), Palermo, Gianluca (Editor)
• Format: Electronic eBook
• Language: English
• Published: Boston, MA : Springer US : Imprint: Springer, 2011.
• Subjects: Engineering.; Computer-aided engineering.; Electronic circuits.; Circuits and Systems.; Computer-Aided Engineering (CAD, CAE) and Design.

Low Power Networks-on-Chip Edited by: (editors) Cristina Silvano Marcello Lajolo Gianluca Palermo In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and res...

Table of Contents:

• Network-on-Chip Power Estimation
• Timing
• synchronous/asynchronous communication
• Network-on-Chip link design
• Topology exploration
• Network-on-Chip support for CMP/MPSoCs
• Network design for 3D stacked logic and memory
• Beyond the wired Network-on-Chip.