A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof /

• Κύριοι συγγραφείς: Kovalev, Mikhail (Συγγραφέας), Müller, Silvia M. (Συγγραφέας), Paul, Wolfgang J. (Συγγραφέας)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Cham : Springer International Publishing : Imprint: Springer, 2014.
• Σειρά: Lecture Notes in Computer Science, 9000
• Θέματα: Computer science.; Computer hardware.; Microprocessors.; Computer communication systems.; Software engineering.; Programming languages (Electronic computers).; Algorithms.; Computer Science.; Algorithm Analysis and Problem Complexity.; Software Engineering.; Computer Hardware.; Processor Architectures.; Computer Communication Networks.; Programming Languages, Compilers, Interpreters.

This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The...