A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof /
This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The...
Κύριοι συγγραφείς: | Kovalev, Mikhail (Συγγραφέας), Müller, Silvia M. (Συγγραφέας), Paul, Wolfgang J. (Συγγραφέας) |
---|---|
Συγγραφή απο Οργανισμό/Αρχή: | SpringerLink (Online service) |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Cham :
Springer International Publishing : Imprint: Springer,
2014.
|
Σειρά: | Lecture Notes in Computer Science,
9000 |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Παρόμοια τεκμήρια
-
OpenMP: Memory, Devices, and Tasks 12th International Workshop on OpenMP, IWOMP 2016, Nara, Japan, October 5-7, 2016, Proceedings /
Έκδοση: (2016) -
OpenMP: Heterogenous Execution and Data Movements 11th International Workshop on OpenMP, IWOMP 2015, Aachen, Germany, October 1-2, 2015, Proceedings /
Έκδοση: (2015) -
Higher-Level Hardware Synthesis
ανά: Sharp, Richard
Έκδοση: (2004) -
Using and Improving OpenMP for Devices, Tasks, and More 10th International Workshop on OpenMP, IWOMP 2014, Salvador, Brazil, September 28-30, 2014. Proceedings /
Έκδοση: (2014) -
Advanced Parallel Processing Technologies 12th International Symposium, APPT 2017, Santiago de Compostela, Spain, August 29, 2017, Proceedings /
Έκδοση: (2017)