A Pipelined Multi-core MIPS Machine Hardware Implementation and Correctness Proof /
This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The...
| Main Authors: | Kovalev, Mikhail (Author), Müller, Silvia M. (Author), Paul, Wolfgang J. (Author) |
|---|---|
| Corporate Author: | SpringerLink (Online service) |
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Cham :
Springer International Publishing : Imprint: Springer,
2014.
|
| Series: | Lecture Notes in Computer Science,
9000 |
| Subjects: | |
| Online Access: | Full Text via HEAL-Link |
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