Higher-Level Hardware Synthesis
In the mid 1960s, when a single chip contained an average of 50 transistors, Gordon Moore observed that integrated circuits were doubling in complexity every year. In an in?uential article published by Electronics Magazine in 1965, Moore predicted that this trend would continue for the next 10 years...
Κύριος συγγραφέας: | |
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Συγγραφή απο Οργανισμό/Αρχή: | |
Μορφή: | Ηλεκτρονική πηγή Ηλ. βιβλίο |
Γλώσσα: | English |
Έκδοση: |
Berlin, Heidelberg :
Springer Berlin Heidelberg,
2004.
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Σειρά: | Lecture Notes in Computer Science,
2963 |
Θέματα: | |
Διαθέσιμο Online: | Full Text via HEAL-Link |
Πίνακας περιεχομένων:
- 1. Introduction
- 1. Introduction
- 2. Related Work
- 3. The SAFL Language
- 4. Soft Scheduling
- 5. High-Level Synthesis of SAFL
- 6. Analysis and Optimisation of Intermediate Code
- 7. Dealing with I/O
- 8. Combining Behaviour and Structure
- 9. Transformation of SAFL Specifications
- 10. Case Study
- 11. Conclusions and Further Work.