Test Generation of Crosstalk Delay Faults in VLSI Circuits

• Main Authors: Jayanthy, S. (Author, http://id.loc.gov/vocabulary/relators/aut), Bhuvaneswari, M.C (http://id.loc.gov/vocabulary/relators/aut)
• Corporate Author: SpringerLink (Online service)
• Format: Electronic eBook
• Language: English
• Published: Singapore : Springer Singapore : Imprint: Springer, 2019.
• Edition: 1st ed. 2019.
• Subjects: Electronic circuits.; Microprogramming .; Computer software-Reusability.; Logic design.; Circuits and Systems.; Control Structures and Microprogramming.; Performance and Reliability.; Logic Design.

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on cu...