Test Generation of Crosstalk Delay Faults in VLSI Circuits

• Κύριοι συγγραφείς: Jayanthy, S. (Συγγραφέας, http://id.loc.gov/vocabulary/relators/aut), Bhuvaneswari, M.C (http://id.loc.gov/vocabulary/relators/aut)
• Συγγραφή απο Οργανισμό/Αρχή: SpringerLink (Online service)
• Μορφή: Ηλεκτρονική πηγή Ηλ. βιβλίο
• Γλώσσα: English
• Έκδοση: Singapore : Springer Singapore : Imprint: Springer, 2019.
• Έκδοση: 1st ed. 2019.
• Θέματα: Electronic circuits.; Microprogramming .; Computer software-Reusability.; Logic design.; Circuits and Systems.; Control Structures and Microprogramming.; Performance and Reliability.; Logic Design.
• Φυσική περιγραφή: XI, 156 p. 49 illus., 7 illus. in color. online resource.
• ISBN: 9789811324932
• DOI: 10.1007/978-981-13-2493-2

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.