Hardware acceleration of AI/deep learning applications for the RISC-V architecture

• Main Author: Λιάσος, Αλέξανδρος
• Other Authors: Liasos, Alexandros
• Language: English
• Published: 2021
• Subjects: Hardware acceleration; Artificial Intelligence; Deep learning; RISC; Reduced instruction set computer; RISC-V; Processors; Hardware description language; VHDL; Neural networks; Convolutional neural networks; Programmable logic; FPGA; Instruction set extension; Co-processors; Hardware design; Επιταχυντές υλικού; Τεχνητή νοημοσύνη; Βαθιά μάθηση; Επεξεργαστές; Γλώσσα περιγραφής υλικού; Νευρωνικά δίκτυα; Συνελικτικά νευρωνικά δίκτυα; Προγραμματιζόμενη λογική; Επέκταση συνόλου εντολών; Συν-επεξεργαστές; Σχεδιασμός υλικού

AI & Deep Learning Applications are becoming increasingly popular in our everyday lives. The massive improvements in computing performance that originate in the late 20th century made it possible to implement AI and Deep Learning features in all sorts of instances. Cars now feature Virtual Assis...