Application specific instruction set processor based on RISC-V architectures, for state estimation algorithm on smart grids

• Κύριος συγγραφέας: Θεοδωρακόπουλος, Βασίλης
• Άλλοι συγγραφείς: Theodorakopoulos, Vasilis
• Γλώσσα: English
• Έκδοση: 2021
• Θέματα: Processors; RISC-V; Instruction set architectures; System verilog; Cv32e40p; FPGA implementation; Αρχιτεκτονική υπολογιστών; Αλγόριθμος εκτίμησης κατάστασης; Εντολές επεξεργαστή

This work experimented with using a custom instruction set extension for performing the multiply and accumulate instruction which is critical for the Transient State Estimation algorithm. Custom modules were designed and implemented on a RISC-V processor core. The open- source nature of RIS...