Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout
"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and t...
Main Authors: | , , |
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Corporate Author: | |
Format: | Electronic eBook |
Language: | English |
Published: |
Boston, MA :
Springer US,
2004.
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Subjects: | |
Online Access: | Full Text via HEAL-Link |
Table of Contents:
- Verification Process
- Using SCV for Verification
- Functional Verification Testplan
- Testbench Concepts using SystemC
- Verification Methodology
- Regression/Setup and Run
- Functional Coverage
- Dynamic Memory Modeling
- Post Synthesis Gate Simulation.